The DIP (Dual In Line) Integrated circuit 'chips', so common today, were just beginning to replace the earlier TO-5 'transistor' circular package in the 1960's. In today's world, these IC chips are automatically inserted into multi-layer printed circuit boards by robots (such as found on the ubiquitous 'motherboard' of millions of home desktop and laptop computers, as common examples). However, for our low-volume manufacturing of high-speed OMR scanners, MRC Engineering could not afford the expensive tooling required for a very limited-run quantity of printed circuit boards, and therefore, we resorted to 'pluggable wire wrap' motherboards, or backplanes, as we called them. Basically, the idea was to be able to plug the individual DIP modules into rows of connectors whose contacts could be inter-connected with each other on the backplane according to the logic function paths required to implement a given circuit function (signal gates, flip-flops, shift-registers, counters, operational amplifiers, parity checkers, and so on). Although there were commercially available mating dual-inline sockets for the new generation of DIP's in the 1960s, they were designed for soldering into a printed circuit motherboard, or alternatively, the required backplane interconnections could be wire-wrapped - either manually, or by automated equipment - and each of these approaches were later used in MRC logic modules. However, neither of these two methods was considered appropriate for our low-volume manufacturing of OMR sheet scanners or card readers in the mid-to-late 1960's. Thus, I came up with the idea of a DIPCHIP package, which was essentially an industry standard DIP integrated circuit wherein the 7 pairs of leads protruding on either side of the dual inline plastic housing were 'bent' with an MRC jig fixture, such that the leads could be easily soldered onto a miniature mating strip of printed circuit material. The sketch on page-5, and the diagram on page-50 of the 60-page TECHNICAL RELEASE Report shows clearly what is rather difficult to explain in text. Modular assemblies could be produced with a variety of DIP functions, such as logic gates, counters, amplifiers, shift registers, and the like, all with the same uniform physical size. Then, it was a simple matter to plug these little modules into a linear array of mating sockets, and inter-connected by pluggable wires on the backplane to achieve the desired circuit/logic functions. Another perceived advantage was that if a given DIP should fail or malfunction, the repair was as simple as unplugging the defective DIPCHIP and plugging in a replacement unit. Although this packaging scheme had a rather short life cycle, due to rapid changes in integrated circuit packaging technology (and thus we did not apply for a U. S. Patent), the 'DIPCHIP' methodology was employed by MRC in crafting a large backplane for the Model 650-E high-speed OMR sheet scanner which was delivered to Document Reader Services, Ltd, in London, England. This MRC designed product performed successfully for many years with minimum maintenance issues by the DRS staff. Following my installation trip to London, we never made another call, nor had but very few requests for replacement parts. Other JVM archival files will cover the 650-E project in greater detail