41. 1963_06_24 to 02_26_1964_MRC Engineering Lab Notebook, JVM #06, 1963 June 24-1964 February 26
Scope and Contents
This Original Copy of my MRC Lab Note book #6 primarily covers hand-written entries such as: mathematical analyses, derivation equations, design sketches, circuit schematics, logic diagrams, flow charts, lab measurement data, conceptual ideas, and any other notations or entries were related the design of 'transistorized' logic circuits. In those early days, one could not simply buy an integrated-circuit chip to execute Boolean functions, such as OR, NOR, AND, and NAND "0/1" binary-tree decisions. Although there were a number of available commercial sources for printed-circuit boards for use in processing-systems design, they were expensive, and not particularly well suited to our special needs at MRC for incorporating them into our newer OMR scoring machines, that would be totally solid-state, leaving the MRC Mod I, II, & III vacuum-tube era behind 'for once and for all'. Accordingly, it was one of my major tasks during the early 1960s to design a complete family of logic circuits and package them on small-size modular building-block printed circuit cards. A review of this lab book, or alternatively, the 100+ JPEG-Image files on the Media Disc (DVD) Folder named 1963_06_MRC Eng.Notebk JVM#06, will illustrate the endless calculations necessary to derive 'worst-case' analyses for the values of the key component variables (transistors, resistors, diodes, and supply voltages) incorporated into TRL NOR circuits, and related ones. A change in the value of one variable interacted and influenced the optimization of the others, and there were obviously no slick little desktop computer software in those days to relieve the tedium of slide-rule based calculations and analysis of optimum choices for the design parameters. Graphical nomograms were sometimes used (I bet the younger engineers today, wouldn't even know what this means, or for that matter what 'TRL' stands for!) A review of this Lab Book will convince the reader that a major emphasis was always placed on "worst-case" design analysis (mathematical derivations and formulae, bench measurements, etc.) - that is, for a given circuit configuration, the next step was to conduct numerous lab tests under temperature extremes, voltage variations, resistor tolerances, transistor amplification-gain, and "0/1" binary input/output loading factors to ensure that a binary "0" was always a "0", and a binary "1" was always a "1". Failure to give priority attention to these matters would have resulted in inaccurate OMR signal processing in our new line of completely solid-state scoring machines. TRL (Transistor Resistor Logic) was a very popular design approach in the early 1960s, followed by more sophisticated T2L (Transistor-transistor Logic), and other schemes. Yet today, of course, the heart and soul of an Intel or AMD integrated-circuit chip PC containing hundreds of millions of equivalent transistors is still manipulating the "0/1" state of binary arithmetic, with Boolean-logic components and storage (RAM), but done in incredibly tiny domains, with miniscule power factors. The circuit designs covered in this MRC Lab book were incorporated into the MRC Mod 7 OMR Scanner for Southern Illinois University, and similar 'scanner technology' scanners used in our own MRC test-processing facility
Dates
- Creation: 1963 June 24-1964 February 26
Creator
- From the Collection: McMillin, John V. (Person)
Conditions Governing Access
This collection is open for research.
Extent
From the Collection: 14.50 Linear Feet
Language of Materials
From the Collection: English
Repository Details
Part of the University of Iowa Archives Repository
100 Main Library
University of Iowa Libraries
Iowa City IA 52242
319-335-5921
lib-spec@uiowa.edu